Interrupt Handling in Computer System
In computer system architecture, hardware devices are connected via the system bus. All hardware devices access the main memory via the system bus.
There are device controllers to access each type of peripheral device. The most common controllers are disk controllers, USB controllers, and graphics controllers.
Each device controller has a local buffer and set of registers that are used to transfer the data between the system and the device. Data to the system is sent via the system bus.
The operating system has component—device drivers. Device drivers are used to communicating with the device controller. One device driver for each device controller. A most important factor to note here is that CPU and device controllers can process in parallel.
Let’s say a process P1 is executing in the CPU and it needs to read a file from the disk.
The process will make a system call to read the file. CPU changes the mode from the user mode to the kernel mode. OS kernel gives instruction to the disk driver to read the disk blocks which contain the requested file over the system bus.
The HDD device controller reads the data to the disk and starts transferring the data to the memory. At this point the time, the CPU can execute another process as we already studied that CPU and device controller can execute in parallel.
As soon as the device controller is done with the data transfer it needs to inform the CPU after the completed operation.
Hence device controller will send an interrupt to the CPU. Interrupts are used to inform async events to the CPU.
As soon as the CPU receives an interrupt it stops the current execution. It transfers the controller to the interrupt handler routine (Part of the kernel). Interrupt handler routine based on the interrupt type handle the corresponding interrupt handler routine.
Interrupts can be raised by any hardware device.
Now the question is how does the interrupt handler routine decide which interrupt handler code it has to execute?
At the initial memory addresses, an interrupt handler table is maintained. An interrupt handler table is like a map (key-value). Key is the type of interrupt and value is the pointer to the function to handle the interrupt.
Both Linux and windows handle the interrupts using an interrupt handler table.
Just to summarize back,
- CPU has a pin which is known as an interrupt request pin
- CPU continuously monitors this pin after every instruction execution to check if any signal has been sent.
- If the CPU receives a signal over this pin it transfers the control to the interrupt handler routine.
- The interrupt handler routine handles the interrupt using the interrupt table.
Sometimes while executing the critical instruction we don’t want CPU cycles to waste in non-useful interrupt handling. Hence CPU exposes the concept of two pins one for maskable interrupts and non-maskable interrupts. Maskable interrupts can be switched off during the execution of the critical instructions.
Interrupts are used to handle async events. These events are generally raised by the device controllers and hardware of the system. The priority interrupts concept is used to prioritize the important work first. The system should be optimized for interrupt handling as it occurs very frequently.